Evaluation of the Teledyne ADQ32 Card for Thomson Scattering Diagnostics
AUG Seminar
- Date: Jul 2, 2025
- Time: 01:20 PM - 02:00 PM (Local Time Germany)
- Speaker: César Gonzalez
- Universidad Politécnica de Madrid
- Location: L6 II
- Room: Seminarraum L6, 2.Stock Süd
Teledyne SP Devices has developed high-performance data acquisition systems that integrate an open FPGA to enable real-time signal processing. This work explores the feasibility of implementing the Thomson scattering dispersion algorithm directly on the FPGA of theADQ32 digitizer. The algorithm was developed using high-level synthesis (HLS), while a hardware description language (HDL) was used to interface with the ADQ signal architecture. A dedicated control program was built within the Discharge Control System (DCS), leveraging the API provided by Teledyne to configure and operate the card. The FPGA-based implementation produced results identical to the C++ version of the algorithm, with an execution time of 170μs, demonstrating its potential for real-time plasma diagnostics.